Electronics and microelectronics - Optoelectronics
In the context of a collaboration with Stanford University (USA), the CEA-LETI proposes a PhD topic whose objective is to explore and design a Processing-in-Memory architecture, targeting Big Data application. For data intensive tasks, new architecture paradigm is envisioned, by bringing computation close to the data and using advanced integration technology such as 3D integration. The concept will be designed and validated on silicon.
In this PhD project, it is proposed to explore and design a new Processing-In-Memory architecture that would benefit from advanced 3D integration, targeting Big-Data application. In the PhD, it is proposed to:
- Analyze the data intensive targeted applications (Deep Neural Network, Machine Learning),
- Explore the technological parameters, to define the technology and architecture partitioning,
- Design an accelerator primitive function, implementing the processing-in-memory paradigm,
- Explore and validate the proposed architecture using system level models, to benchmark the performance gains on applications,
- Explore and validate physical aspects, such as power, thermal, or resilience issues,
- Implement a subset of the proposed architecture, for fabrication, validation and performance measurements on silicon.
- Disseminate the research results in scientific conferences and journals.
The PhD will take place in CEA-LETI digital architecture laboratory, with a strong experience in system architecture and 3D technology, and will be in collaboration with the University of Stanford, with a solid background on the target applications and system modelling.
For this PhD topic, a strongly skilled student is anticipated, with a high level of motivation, a capacity to propose innovative ideas and to work both autonomously and within a research team.
Required skills : System architecture, Digital design (VHDL), Software (Operating System, C++), with knowledge on System modelling (SystemC) and/or physical design (Place&Route), fluent English is mandatory.
Département Architectures Conception et Logiciels Embarqués (LIST-LETI)
Laboratoire Intégration Silicium des Architectures Numériques
17 rue des Martyrs
38054 Grenoble Cedex 9
Phone number: 04 38 78 25 51
UNIVERSITY / GRADUATE SCHOOL
Electronique, Electrotechnique, Automatique, Traitement du Signal (EEATS)
FIND OUT MORE
Start date on 01-04-2017
17, rue des martyrs, 38054 GRENOBLE cedex 9
Phone number: 04 38 78 59 36
« The age limit is 26 years for PhD offers and 30 years old for post-doc offers. »